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NOTE
If a bus error or address error occurs during return address
stacking, the CPU returns an error status via the serial interface
and remains in BOM.
If
a bus error or address error occurs on the first instruction
prefetch from the new PC, the processor exits BOM and the error is
trapped as a normal mode exception. The stacked value of the
current PC may not be valid in this case, depending on the state of
the machine prior to entering BOM. For address error, the PC
does not reflect the true return PC.
Instead, the stacked fault
address is the (odd) return PC.
Command Format:
15 14 13 12 11 10
9
8
7
6
5
4
3
2
o
0101010101010101010101
Command Sequence:
Operand Data:
The 32-bit operand data is the starting location of the patch routine, which is
the initial PC upon exiting BDM.
Resu It Data:
None
As an example, consider the following code segment. It is supposed to output a
character to an asynchronous communications interface adaptor -
note that
the routine fails to check the transmit data register empty (TORE) flag.
CPU32 REFERENCE MANUAL
DEVELOPMENT SUPPORT
MOTOROLA
7-29
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