Motorola CPU32 Reference Manual page 355

8.3.14 Save and Restore Operations
The save and restore operations table indicates the number of clock periods
needed for the processor to perform the specified state save or return from
exception. Complete execution times and stack length are given. No additional
tables are needed to calculate total effective execution time for these
instructions. The total number of clock cycles is outside the parentheses. The
numbers inside parentheses (r/p/w) are included in the total clock cycle number.
All timing data assumes two-clock reads and writes.
MOTOROLA
8-28
Instruction Head Tail Cycles
BERR on instruction
0
-2
<58(2/2/12)
BERR on exception 0
-2
48(212112)
RTE (four-word frame)
1
-2
24(4/2/0)
RTE (six-word frame) 1
-2
26(4/2/0)
RTE (BERR on instruction) 1
-2
50(12/12/y)
RTE (BERR on four-word frame) 1
-2
66(10/2/4)
RTE (BERR on six-word frame) 1
-2
70(12/2/6)
<
= Maximum time is indicated - certain data or mode combinations execute faster.
Y = If a bus error occurred during a write cycle, the cycle is rerun by the RTE.
INSTRUCTION EXECUTION CPU32 REFERENCE MANUAL
TIMING