Motorola CPU32 Reference Manual page 242

M68300 series central processor unit
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SUB
15
14
13
12
11
10
9
1
1
0
Opmode Field:
1
Byte
000
100
REGISTER
Word
001
101
8
7
OPMODE
Long
010
110
6
5
4
3
2
EFFECTIVE ADDRESS
MODE
Operation
«ea» - (Dn»
~
(Dn)
«Dn» - (ea»
~
(ea)
I
REGISTER
o
SUBA
15
14
13
12
11
1
0
Opmode Field:
0
1
Word
011
10
9
REGISTER
Long
111
8
7
6
5
OPMODE
Operation
(An») - (ea»)
~
(Dn)
4
3
2
o
EFFECTIVE ADDRESS
MODE
I
REGISTER
SUBX
CMP
15
14
13
12
11
10
9
8
7
6
I
1
I
o
I
REGISTER
Ax
SIZE
Size Field: 00
=
Byte 01
=
Word 10
=
Long
RIM Field: 0
=
Data Register to Data Register 1
=
Memory to Memory
If RIM
=
0, both registers must be data registers
5
4
3
2
1
0
o
o
I
RIM
I
REGISTERRy
If RIM
=
1, both registers must be address registers for Predecrement Addressing mode
15
14
13
12
11
10
9
1
0
1
Opmode Field:
1
Byte
000
REGISTER
Word
001
8
7
OPMODE
Long
010
6
5
4
3
2
EFFECTIVE ADDRESS
MODE
Operation
(Dn») - (ea»)
~
CCR
I
REGISTER
o
CPU32 REFERENCE MANUAL
INSTRUCTION SET
MOTOROLA
4-189
III

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