Motorola CPU32 Reference Manual page 72

M68300 series central processor unit
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INSTRUCTION NAME
---------------~
OPERATION DESCRIPTION
-------------~~
ASSEMBLER SYNTAX FOR THIS INSTRUCTION
--------~
SIZE ATIRIBUTE
----------------~
TEXT DESCRIPTION OF INSTRUCTION OPERATION
-------~
CONDITION CODE
EFFECTS-------------~
INSTRUCTION FORMAT (THIS SPECIFIES THE BIT PATIERN AND }
FIELDS OF THE OPERATION AND COMMAND WORDS, AND ANY
OTHER WORDS THAT ARE ALWAYS PART OF THE
INSTRUCTION. THE EFFECTIVE ADDRESS EXTENSIONS ARE
NOT EXPLICITLY ILLUSTRATED. THE EXTENSION WORDS (IF
ANY) FOLLOW IMMEDIATELY AFTER THE ILLUSTRATED
PORTIONS OF THE INSTRUCTIONS.
MEANINGS AND ALLOWED VALUES (FOR THE VARIOUS
-----~
FIELDS REQUIRED BY THE INSTRUCTION FORMAT)
ABeD
Operation:
Source10
+
Destination
+
Assembler
Syntax:
ABCD DY,Dx
ABCD - (Ay), -
(Ax)
Attributes:
Size
=
(Byte)
Description:
Adds the source
0
and stores the result in the desti
decimal arithmetic. The operands,
different ways:
1.
Data reg ister to data reg ister:
specified in the instruction.
2. Memory to memory: The ope
addreSSing mode using the
Condition Codes:
X
N
Z
V
C
I • I
U
I •
U
• I
X
Set the same as the carry bit.
N Undefined.
Z
Cleared if the result is nonzero. Un
V
Undefined.
C Set if a decimal carry was gene
NOTE
Normally the Z condition code bit
an operation. This allows s
of multiple-precision operations.
If RIM
=
0, Rx and Ry are Data Registers
If RIM
=
1, Rx and Ry are Address Registers for th
Instruction Fields:
Register Rx field - Specifies the desti
If RIM
=
0,
specifies a data regl
If RIM
=
1, specifies an address
RIM field - Specifies the operand
o -
the operation is data
1 - the operation is memory to
Register Ry field - Specifies the
If RIM
=
0,
specifies a data
If RIM
=
1 , specifies an
Figure 4-2. Instruction Description Format
CPU32 REFERENCE MANUAL
INSTRUCTION SET
MOTOROLA
4-19

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