Motorola CPU32 Reference Manual page 357

Control Registers
MC68000
MC68010
CPU32
MC68020
Stack Poi nters
MC68000
MC68010
CPU32
MC68020
None
SFC,DFC,VBR
SFC,DFC,VBR
SFC, DFC,VBR, CACR, CAAR
USP, SSP
USP, SSP
USP, SSP
USP, SSP (MSP, ISP)
Status Register Bits
MC68000
MC68010
CPU32
MC68020
T, S, 10/11/12, XlN/ZN/C
T, S, 10/11/12, XlNIZIV/C
T1fTO, S, 10/11/12, XlNIZN/C
T1fTO, S, M, 10/11/12, XlN/ZN/C
Function Code/Address Space
MC68000
MC68010
CPU32
MC68020
FCO - FC2 = is Interrupt Acknowledge Only
FCO - FC2 = 7 is CPU Space
FCO - FC2 = 7 is CPU Space
FCO - FC2
=
7 is CPU Space
Indivisible Bus Cycles
MC68000
MC68010
CPU32
MC68020
Stack Frames
MC68000
MC68010
CPU32
MC68020
MOTOROLA
A-2
Use AS Signal
Use AS Signal
Use RMC Signal
Use RMC Signal
Supports Original Set
Supports Formats $0, $8
Supports Formats $0, $2, $C
Supports Formats $0, $1, $2, $9, $A, $B
APPENDIX A CPU32 REFERENCE MANUAL
M68000 FAMILY SUMMARY