Motorola CPU32 Reference Manual page 264

SECTION 6
EXCEPTION PROCESSING
This section discusses system resources related to exception handling,
exception processing sequence, and specific features of individual exception
processing routines
6.1 Definition of Exception Processing
An exception is a special condition that pre-empts normal processing.
Exception processing is the transition from normal mode program execution to
execution of a routine that deals with an exception.
6.1.1 Exception Vectors
An exception vector is the address of a routine that handles an exception. The
vector base register (VBR) contains the base address of a 1024-byte exception
vector table, which consists of 256 exception vectors. Sixty-four vectors are
defined by the processor, and 192 vectdrs are reserved for user definition as
interrupt vectors. Except for the reset vector, each vector in the table is one long
word in length. The reset vector is two long words in length. Refer to Table 6-1
for information on vector assignment.
CAUTION
Because there is no protection on the 64 processor-defined
vectors, external devices can access vectors reserved for internal
purposes - this practice is strongly discouraged.
All exception vectors, except the reset vector, are located in supervisor data
space. The reset vector is located in supervisor program space. Only the initial
reset vector is fixed in the processor memory map. When initialization is
complete, there are no fixed assignments. Since the VBR stores the vector
table base address, the table can be located anywhere in memory. It can also
be dynamically relocated for each task executed by an operating system.
CPU32 REFERENCE MANUAL EXCEPTION PROCESSING MOTOROLA
6-1