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III
31
31
31
I
31
31
31
31
MOTOROLA
2-2
16 15
8 7
0
DO
01
02
03
DATA REGISTERS
04
05
06
07
16 15
0
AO
A1
A2
A3
ADDRESS REGISTERS
A4
A5
A6
1615
0
I
A7 (USP)
USER STACK POINTER
0
I
PC
PROGRAM COUNTER
15
8 7
0
0
I
CCR
CONDITION CODE
REGISTER
Figure 2-1. User Programming Model
16 15
0
I
AT
(SSP)
SUPERVISOR STACK
POINTER
15
8 7
0
(CCR)
I
SR
STATUS REGISTER
0
I
PC
PROGRAM COUNTER
3
2
0
I
SFC
ALTERNATE FUNCTION
CODE REGISTERS
DFC
Figure 2-2. Supervisor Programming Model Supplement
ARCHITECTURE SUMMARY
CPU32 REFERENCE MANUAL
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