Table Of Contents - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

CONTENTS
Chapter 1 Overview ...........................................................................................................................................1
1.1 Features ..........................................................................................................................................1
1.2 Product Lineup ................................................................................................................................3
1.3 Block Diagram .................................................................................................................................4
1.4 Pin Assignment ...............................................................................................................................5
1.4.1 SQFP-100 Pin Assignment ....................................................................................................5
1.4.1 QFP-100 Pin Assignment ......................................................................................................6
1.5 Pin Functions ..................................................................................................................................7
1.6 Handling the Device ......................................................................................................................14
Chapter 2 CPU ..................................................................................................................................................15
2.1 CPU ...............................................................................................................................................15
2.1.1 Memory space .....................................................................................................................16
2.1.2 Registers .............................................................................................................................20
2.1.3 Prefix codes .........................................................................................................................28
Chapter 3 Memory ............................................................................................................................................31
3.1 Memory Access Modes .................................................................................................................31
3.1.1 Mode pins ............................................................................................................................32
3.1.2 Mode data ............................................................................................................................33
3.1.3 Bus Mode ............................................................................................................................34
3.2 External Memory Access ...............................................................................................................36
3.2.1 Block diagram ......................................................................................................................36
3.2.2 Registers and Register details .............................................................................................37
3.2.1 Operations ...........................................................................................................................42
Chapter 4 Clock and Reset ..............................................................................................................................47
4.1 Clock Generator ............................................................................................................................47
4.2 Reset Causes ................................................................................................................................48
4.3 Operation after reset release ........................................................................................................50
Chapter 5 Watchdog Timer, Timebase Timer, and Watch Timer Functions ...............................................51
5.1 Outline ...........................................................................................................................................51
5.2 Block diagram ...............................................................................................................................52
5.3 Registers and register details ........................................................................................................53
5.3.1 WDTC (Watch-Dog Timer Control Register) .......................................................................54
5.3.2 TBTC (Time Base Timer Control Register) .........................................................................56
5.3.3 Watch Timer Control Register (WTC) ..................................................................................57
5.4 Operation ......................................................................................................................................59
5.4.1 Watch-Dog Timer ................................................................................................................59
5.4.2 Time Base Timer .................................................................................................................60
5.4.3 Watch Timer ........................................................................................................................60
Chapter 6 Low Power Control Circuit .............................................................................................................61
6.1 Outline ...........................................................................................................................................61
6.2 Block Diagram ...............................................................................................................................62
6.3 Registers and register details ........................................................................................................63
6.3.1 LPMCR (Low power mode control register) ........................................................................63
6.3.2 CKSCR (Clock selection register) .......................................................................................65
6.4 Operations .....................................................................................................................................67
6.4.1 Sleep mode .........................................................................................................................68
6.4.2 Pseudo-watch mode ............................................................................................................68
MB90580 Series v