Fujitsu F2MC-16LX MB90580 Series Hardware Manual page 231

[Bits 9, 8, 7] MOD2, MOD1, MOD0
These bits set the operation mode and I/O pin functions.
The MOD2 bit selects the I/O functions. When MOD2 = "0", the input pin functions as a trigger input. In
this case, the reload register contents is loaded to the counter when an active edge is input to the input
pin and count operation proceeds. When MOD2 = "1", the timer operates in gate counter mode and the
input pin functions as a gate input. In this mode, the counter only counts while an active level is input to
the input pin.
The MOD1 and 0 bits set the pin functions for each mode. The following tables list the MOD2, 1, 0 bit
settings
Internal clock mode (CSL0, 1 = "00", "01", or "10")
MOD2
0
0
0
0
1
1
Event counter mode (CSL0,1 = "11")
MOD2
X
[Bit 6] OUTE
Output enable bit. The TOUT pin functions as a general-purpose port when this bit is "0" and as the
timer output pin when this bit is "1". In reload mode, the output waveform toggles. In one-shot mode,
TOUT outputs a square waveform that indicates that counting is in progress.
Note: For reload timer 1 and 2, TOUT is multiplexed with P94/OUT0 and P95/OUT1 respectively.
If output capture is enabled, it has higher priority than reload timer output.
[Bit 5] OUTL
This bit sets the output level for the TOUT pin. When OUTL is "0" or "1", the output pin level is
site
MB90580 Series
MOD1 MOD0
0 0
0 1
1 0
1 1
×
0
×
1
MOD1 MOD0 Input Pin Function
0 0
0 1
1 0
1 1
Note: Bits marked as X in the table can be set to any value.
Chapter 15: 16-Bit Reload Timer (with Event Count Function)
Input Pin Function Active Edge or Level
Trigger disabled
Trigger input
⇑
⇑
Gate input
⇑
Active Edge or Level
—
Trigger input
⇑
⇑
15.3 Registers and Register Details
—
Rising edge
Falling edge
Both edges
"L" level
"H" level
—
Rising edge
Falling edge
Both edges
oppo-
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