Mode Pins; Table 3.1.1A Mode Pins And Modes - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

3.1 Memory Access Modes

3.1.1 Mode pins

Table 3.1.1a describes the operations specified by combinations of the MD2 to MD0 external pins.
Mode pin setting
MD2 MD1 MD0
0 0 0 External vector mode 0
External vector mode 1
0 0 1
0 1 0 (Specification inhibited)
Internal vector mode
0 1 1
1 0 0
1 0 1 (Specification inhibited)
1 1 0
1 1 1 EPROM write
Note: When using internal vector mode 0, the initial value of IOBS and LMBS are '0'. If
IOBS and LMBS are set afterwards, the address range 0000C0H..0000FFH and
002000H..7FFFFFH will use 16-bit data bus.
32 Chapter 3: Memory

Table 3.1.1a Mode pins and modes

Reset vector
Mode name
access area
External
External
Internal
External
data bus
width
8 bits
16 bits
(Mode data)
—— ——
Remarks
Reset vector, 16-bit bus width
access
Reset sequence are based on
mode data.
MB90580 Series