Fujitsu F2MC-16LX MB90580 Series Hardware Manual page 247

[bit 12, 11] : CT1, CT0 (Compare Time)
These bits is used for setting the comparsion time in terms of machine cycle.
CT1
0
0
1
1
When the bits is set to '00', the machine clock should not be higher than 8MHz.
Note1:
Note2: Reading these bits always return "1".
[bit 9 to bit 0] : D9 to D0 (ADCR1:1,0 and ADCR0)
ADCR1:1,0 and ADCR0 stores the AD conversion result. These register values are updated each time
conversion is completed. Usually, the final conversion value is stored in these bits.
Upon a reset, these registers are undefined.
The conversion data protection function is available. See Section 2.7.4, "Operations."
Note: Ensure that no data is written to these registers during A/D conversion.
MB90580 Series
CT0 Comparsion time machine cycle
0 176 machine cycle
1 352 machine cycle
0
1
16.3 Registers and Register Details
Comparsion time
22ms at 8MHz machine clock
22ms at 16MHz machine
clock
Reserved
Reserved
Chapter 16: A/D Converter 227