Pwc Data Buffer Register (Pwcr) - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

18.3.2 PWC data buffer register (PWCR)

PWC Data Buffer Register (Upper Byte)
Address : 000057
Read/write
Initial value
PWC Data Buffer Register (Lower Byte)
Address : 000056
Read/write
Initial value
(1) In timer mode
In reload timer operation mode (bit 3 S/C of PWCSR = "1"), this register stores the reload value. In
this case, the register is readable and writable.
In single-shot timer operation mode (bit 3 S/C of PWCSR = "0"), accessing this register directly
accesses the up-count timer. Although both reading and writing are allowed in this mode, only write
to the register when the timer is halted. The register can be read at any time to read the current
timer value.
(2) In pulse width count mode ♦ Read-only ♦
In continuous count mode (bit 3 S/C of PWCSR = "1"), this register acts as a buffer register to store
the previous count result. In this case, the register is read-only and writing does not change the
register value.
In single-shot count mode (bit 3 S/C of PWCSR = "0"), accessing this register directly accesses the
up-count timer. The register is read-only in this mode also and writing does not change the register
value. The register can be read at any time to read the current timer value. After the count ends, the
register stores the count result.
Note: Always use word transfer instructions to access this register.
After a reset: Initialized to "0000
MB90580 Series
15 14 13
H
(R/W) (R/W) (R/W)
(X) (X) (X)
7 6 5
H
(R/W) (R/W) (R/W)
(X) (X) (X)
".
H
18.3 Regiaters and Register Details
12 11 10
(R/W) (R/W) (R/W)
(X) (X) (X)
4 3 2
(R/W) (R/W) (R/W)
(X) (X) (X)
Chapter 18: Pulse Width Counter (PWC) Timer
Bit number
9 8
PWCR
(HIGH)
(R/W) (R/W)
(X) (X)
Bit number
1 0
PWCR
(LOW)
(R/W) (R/W)
(X) (X)
249