Table 13.3.8A Status Flag - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

13.3 Registers and Register Details
[bit 3-0] ST3, ST2, ST1, ST0 (Operation status bits)
These bits indicates the communication status of the unit and generates the corresponding interrupt
during transmission or reception. By reading these bits, the communication status of the unit can be
known.
ST3 ST2 ST1
0 0
0 0
0 0
0 0
0 1
0 1
0 1
0 1
1 0
1 0
1 0
1 0
1 1
1 1
1 1
1 1
For more detail description on setting these four bits, please refer to Table 13.5.2a.
156 Chapter 13: IE Bus

Table 13.3.8a Status flag

ST0 Status
0 0
0 1
Master/slave trans-
mit
1 0
1 1
0 0
0 1
Master receive
1 0
1 1
0 0
0 1
Slave receive
1 0
1 1
0 0
0 1
Multiaddress receive
1 0
1 1
State
Transmit starts
During transmission
Transmit ends normally
Ends without all data being transmitted
Master receive starts
Master receive data full
Master receive ends normally
Ends without all data being received
Slave receive starts
Slave receive data buffer full
Slave receive ends normally
Ends without all data being received
Multiaddress receive starts
Multiaddress receive data buffer full
Multiaddress receive ends normally
Ends without all data being received
MB90580 Series