4.3 Operation after reset release
4.3 Operation after reset release
When a reset cause is removed, the F
tor is stored, then fetches the reset vector and mode data. The reset vector and mode data are assigned to
the four bytes between FFFFDC
are transferred to the registers by the hardware as described in Figure 4.3a.
Use the mode pin to specify whether to read the reset vector and mode data from internal ROM or from
external memory. When the mode pin is set to external vector mode, the F
vector and mode data from external memory. When using the F
ROM external bus mode, Fujitsu recommends specifying internal vector mode.
The bus mode after the reset vector and mode data are read is specified by the mode data.
FFFFDF
H
FFFFDE
H
FFFFDD
H
FFFFDC
H
Figure 4.3a Source and destination of reset vector and mode data
50
Chapter 4: Clock and Reset
2
MC-16LX immediately outputs the address in which the reset vec-
and FFFFDF
H
Memory space
Mode data
Reset vector bits 23 to 16
Reset vector bits 15 to 8
Reset vector bits 7 to 0
. After reset is released, the reset vector and mode data
H
2
MC-16LX in single chip mode or internal
2
F
MC-16LX CPU core
Reset sequence
2
MC-16LX reads the reset
Mode
Register
Micro ROM
PCB
PC
MB90580 Series