Port Data Register - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

16-bit microcontrollers
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8.3 Registers and register details

8.3.1 Port data register

PDR0
Address: 000000
PDR1
Address: 000001
PDR2
Address: 000002
PDR3
Address: 000003
PDR4
Address: 000004
PDR5
Address: 000005
PDR6
Address: 000006
PDR7
Address: 000007
PDR8
Address: 000008
PDR9
Address: 000009
PDRA
Address: 00000A
Note: Note that R/W for I/O ports differ from R/W for memory in the following points:
Input mode
Read: The level of the corresponding pin is read.
Write: Data is written to an output latch.
Output mode
Read: The data register latch value is read.
Write: The data is output to the corresponding pin.
104
Chapter 8: Parallel Ports
7
6
5
P07
P06
P05
H
15
14
13
P17
P16
P15
H
7
6
5
P27
P26
P25
H
15
14
13
P37
P36
P35
H
7
6
5
P47
P46
P45
H
15
14
13
P57
P56
P55
H
7
6
5
P65
H
15
14
13
H
7
6
5
P87
P86
P85
H
15
14
13
P97
P96
P95
H
7
6
5
H
4
3
2
1
P04
P03
P02
P01
12
11
10
9
P14
P13
P12
P11
4
3
2
1
P24
P23
P22
P21
12
11
10
9
P34
P33
P32
P31
4
3
2
1
P44
P43
P42
P41
12
11
10
9
P54
P53
P52
P51
4
3
2
1
P64
P63
P62
P61
12
11
10
9
P74
P73
P72
P71
4
3
2
1
P84
P83
P82
P81
12
11
10
9
P94
P93
P92
P91
4
3
2
1
PA2
PA1
0
Initial value
Access
xxxxxxxx
R/W
P00
8
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P10
R/W
0
R/W
P20
xxxxxxxx
8
xxxxxxxx
R/W
P30
0
R/W
P40
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8
R/W
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P50
0
--xxxxxx
R/W
P60
8
R/W
---xxxx-
0
R/W
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P80
8
R/W
xxxxxxxx
P90
0
R/W
PA0
-----xxx
MB90580 Series

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