Table 5.3.1B Watchdog Timer Interval Selection Bits - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

16-bit microcontrollers
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WDCS/
SCM
Note: The maximum interval value is the value when the time base counter or the
clock counter are not reset during watchdog operation.
MB90580 Series

Table 5.3.1b Watchdog Timer Interval Selection Bits

WT1
WT0
1
0
0
1
0
1
1
1
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
1
Chapter 5: Watchdog Timer, Timebase Timer, and Watch Timer Functions
Interval Time
(Source oscillation: 4 MHz)
Minimum
Approx. 3.58 ms
Approx. 14.33 ms
Approx. 18.43 ms
Approx. 57.23 ms
Approx. 73.73 ms
Approx. 458.75 ms
Approx. 589.82 ms
Approx. 0.109 s
Approx. 0.875 s
Approx. 1.75 s
Approx. 3.5 s
5.3 Registers and register details
Maximum
Approx. 4.61 ms
Approx. 0.141 s
Approx. 1.125 s
Approx. 2.25 s
Approx. 4.5 s
55

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