Operations; External Interrupts; Figure 9.4.1A External Interrupt - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

9.4 Operations

9.4 Operations

9.4.1 External interrupts

Once an external interrupt request is set, this resource issues an interrupt request signal to the interrupt
controller when a request specified by the ELVR register is input to the corresponding pin. The interrupt
controller identifies the priority levels of the simultaneous interrupts, and issues an interrupt request to the
2
F MC-16 CPU if the interrupt from this resource has the highest priority level. The F
compares the ILM bit of its internal CCR register and the interrupt request. If the interrupt level of the
request is higher than that indicated by the ILM bit, the F
cessing microprogram as soon as the currently executing instruction is terminated.
External interrupt/DTP
ELVR
EIRR
ENIR
Cause
In the hardware interrupt processing microprogram, the CPU reads the ISE bit information from the
interrupt controller, identifies that the request is for interrupt processing based on that information, and
branches to the interrupt processing microprogram. The interrupt processing microprogram reads the
interrupt vector area and issues an interrupt acknowledgment signal for the interrupt controller. Then, the
microprogram transfers the jump destination address of the macro instruction generated from the vector to
the program counter, and executes the user interrupt processing program.
112 Chapter 9: DTP/External Interrupt
Interrupt controller
Other request
ICR
yy
ICR
xx

Figure 9.4.1a External interrupt

2
MC-16 CPU activates the hardware interrupt pro-
2
F MC-16CPU
IL
CMP
ILM
NTA
2
MC-16 CPU
CMP
MB90580 Series