Fujitsu F2MC-16LX MB90580 Series Hardware Manual page 128

8.3 Registers and register details
[bit 9] - LN9 controls Port 9
0
1
[bit 8] - LN8 controls Port 8
0
1
[bit 7] - LN7 controls Port 7
0
1
[bit 6] - LN6 controls Port 6
0
1
[bit 5] - LN5 controls Port 5
0
1
[bit 4] - LN4 controls Port 4
0
1
[bit 3] - LN3 controls Port 3
0
1
[bit 2] - LN2 controls Port 2
0
1
[bit 1] - LN1 controls Port 1
0
1
[bit 0] - LN0 control Port 0
0
1
Note: These two register are not available for MB90V580.
Note: When low noise output buffer is selected, the driving power will be decreased.
108 Chapter 8: Parallel Ports
Normal output buffer
Low noise output buffer
Normal output buffer
Low noise output buffer
Normal output buffer
Low noise output buffer
Normal output buffer
Low noise output buffer
Normal output buffer
Low noise output buffer
Normal output buffer
Low noise output buffer
Normal output buffer
Low noise output buffer
Normal output buffer
Low noise output buffer
Normal output buffer
Low noise output buffer
Normal output buffer
Low noise output buffer
[initial value]
[initial value]
[initial value]
[initial value]
[initial value]
[initial value]
[initial value]
[initial value]
[initial value]
[initial value]
MB90580 Series