Philips LPC213 Series User Manual page 119

Philips Semiconductors
Volume 1
11.7.1 I
and I2C1, I2C1CONSET - 0xE005 C000)
The I2CONSET registers control setting of bits in the I2CON register that controls
operation of the I
corresponding bit in the I
Table 108: I
Bit Symbol
1:0 -
2
3
4
5
6
7
I2EN I
cleared by writing 1 to the I2ENC bit in the I2CONCLR register. When I2EN is 0, the I
interface is disabled.
When I2EN is "0", the SDA and SCL input signals are ignored, the I
addressed" slave state, and the STO bit is forced to "0".
I2EN should not be used to temporarily release the I
2
I
STA is the START flag. Setting this bit causes the I
transmit a START condition or transmit a repeated START condition if it is already in
master mode.
When STA is 1 and the I
checks the bus and generates a START condition if the bus is free. If the bus is not free, it
waits for a STOP condition (which will free the bus) and generates a START condition after
a delay of a half clock period of the internal clock generator. If the I
in master mode and data has been transmitted or received, it transmits a repeated START
condition. STA may be set at any time, including when the I
slave mode.
STA can be cleared by writing 1 to the STAC bit in the I2CONCLR register. When STA is 0,
no START condition or repeated START condition will be generated.
If STA and STO are both set, then a STOP condition is transmitted on the I
interface is in master mode, and transmits a START condition thereafter. If the I
interface is in slave mode, an internal STOP condition is generated, but is not transmitted
on the bus.
User manual
2
C Control Set register (I2CONSET: I2C0, I2C0CONSET - 0xE001 C000
2
C interface. Writing a one to a bit of this register causes the
2
C Control Set register (I2CONSET: I2C0, I2C0CONSET - address 0xE001 C000
and I2C1, I2C1CONSET - address 0xE005 C000) bit description
Description
Reserved. User software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
AA Assert acknowledge flag. See the text below.
2
SI I C interrupt flag.
STO STOP flag. See the text below.
STA START flag. See the text below.
2
I2EN I C interface enable. See the text below.
- Reserved. User software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
2
C Interface Enable. When I2EN is 1, the I
C-bus status is lost. The AA flag should be used instead.
2
Rev. 01 — 24 June 2005
2
C control register to be set. Writing a zero has no effect.
C interface is not already in master mode, it enters master mode,
UM10120
Chapter 11: I
2
C interface is enabled. I2EN can be
2
C block is in the "not
2
C-bus since, when I2EN is reset, the
2
C interface to enter master mode and
2
C interface is already
2
C interface is in an addressed
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
2
C interfaces
Reset
value
NA
0
0
0
0
NA
2
C
2
C-bus if it the
2
C
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