Philips LPC213 Series User Manual page 191

Philips Semiconductors
Volume 1
Table 159: PWM Control Register (PWMPCR - address 0xE001 404C) bit description
Bit Symbol Value
4 PWMSEL4 1
0
5 PWMSEL5 1
0
6 PWMSEL6 1
0
8:7 -
9 PWMENA1 1
0
10 PWMENA2 1
0
11 PWMENA3 1
0
12 PWMENA4 1
0
13 PWMENA5 1
0
14 PWMENA6 1
0
15 -
15.4.9 PWM Latch Enable Register (PWMLER - 0xE001 4050)
The PWM Latch Enable Register is used to control the update of the PWM Match
registers when they are used for PWM generation. When software writes to the location of
a PWM Match register while the Timer is in PWM mode, the value is held in a shadow
register. When a PWM Match 0 event occurs (normally also resetting the timer in PWM
mode), the contents of shadow registers will be transferred to the actual Match registers if
the corresponding bit in the Latch Enable Register has been set. At that point, the new
values will take effect and determine the course of the next PWM cycle. Once the transfer
of new values has taken place, all bits of the LER are automatically cleared. Until the
corresponding bit in the PWMLER is set and a PWM Match 0 event occurs, any value
written to the PWM Match registers has no effect on PWM operation.
For example, if PWM2 is configured for double edge operation and is currently running, a
typical sequence of events for changing the timing would be:
User manual
Description
Selects double edge controlled mode for the PWM4 output.
Selects single edge controlled mode for PWM4.
Selects double edge controlled mode for the PWM5 output.
Selects single edge controlled mode for PWM5.
Selects double edge controlled mode for the PWM6 output.
Selects single edge controlled mode for PWM6.
Reserved, user software should not write ones to reserved bits. The value read from
a reserved bit is not defined.
The PWM1 output enabled.
The PWM1 output disabled.
The PWM2 output enabled.
The PWM2 output disabled.
The PWM3 output enabled.
The PWM3 output disabled.
The PWM4 output enabled.
The PWM4 output disabled.
The PWM5 output enabled.
The PWM5 output disabled.
The PWM6 output enabled.
The PWM6 output disabled.
Reserved, user software should not write ones to reserved bits. The value read from
a reserved bit is not defined.
•
Write a new value to the PWM Match1 register.
•
Write a new value to the PWM Match2 register.
•
Write to the PWMLER, setting bits 1 and 2 at the same time.
•
The altered values will become effective at the next reset of the timer (when a PWM
Match 0 event occurs).
Rev. 01 — 24 June 2005
UM10120
Chapter 15: PWM
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Reset
value
0
0
0
NA
0
0
0
0
0
0
NA
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