Prefetch Abort And Data Abort Exceptions - Philips LPC213 Series User Manual

Philips Semiconductors
Volume 1

2.3 Prefetch abort and data abort exceptions

The LPC2131/2/4/6/8 generates the appropriate bus cycle abort exception if an access is
attempted for an address that is in a reserved or unassigned address region. The regions
are:
For these areas, both attempted data access and instruction fetch generate an exception.
In addition, a Prefetch Abort exception is generated for any instruction fetch that maps to
an AHB or VPB peripheral address.
Within the address space of an existing VPB peripheral, a data abort exception is not
generated in response to an access to an undefined address. Address decoding within
each peripheral is limited to that needed to distinguish defined registers within the
peripheral itself. For example, an access to address 0xE000 D000 (an undefined address
within the UART0 space) may result in an access to the register defined at address
0xE000 C000. Details of such address aliasing within a peripheral space are not defined
in the LPC2131/2/4/6/8 documentation and are not a supported feature.
Note that the ARM core stores the Prefetch Abort flag along with the associated
instruction (which will be meaningless) in the pipeline and processes the abort only if an
attempt is made to execute the instruction fetched from the illegal address. This prevents
accidental aborts that could be caused by prefetches that occur when code is executed
very near a memory boundary.
User manual
•
Areas of the memory map that are not implemented for a specific ARM derivative. For
the LPC2131/2/4/6/8, this is:
– Address space between On-Chip Non-Volatile Memory and On-Chip SRAM,
labelled "Reserved Address Space" in
device this is memory address range from 0x0000 8000 to 0x3FFF FFFF, for 64 kB
Flash device this is memory address range from 0x0001 0000 to 0x3FFF FFFF, for
128 kB Flash device this is memory address range from 0x0002 0000 to
0x3FFF FFFF, for 256 kB Flash device this is memory address range from
0x0004 0000 to 0x3FFF FFFF while for 512 kB Flash device this range is from
0x0008 0000 to 0x3FFF FFFF.
– Address space between On-Chip Static RAM and the Boot Block. Labelled
"Reserved Address Space" in
address range from 0x4000 2000 to 0x7FFF CFFF, for 16 kB SRAM device this is
memory address range from 0x4000 4000 to 0x7FFF CFFF, while for 32 kB SRAM
device this range is from 0x4000 8000 to 0x7FFF CFFF.
– Address space between 0x8000 0000 and 0xDFFF FFFF, labelled "Reserved
Adress Space".
– Reserved regions of the AHB and VPB spaces. See
•
Unassigned AHB peripheral spaces. See
•
Unassigned VPB peripheral spaces. See
Rev. 01 — 24 June 2005
Figure 2 and Figure
Figure 2. For 8 kB SRAM device this is memory
Figure
Figure 4.
Figure 5.
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
UM10120
Chapter 2: Memory map
6. For 32 kB Flash
3.
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