Philips LPC213 Series User Manual page 165

Philips Semiconductors
Volume 1
Table 134: SSP register map
Name
SSPCR0
SSPCR1
SSPDR
SSPSR
SSPCPSR Clock Prescale Register
SSPIMSC
SSPRIS
SSPMIS
SSPICR
[1]
13.4.1 SSP Control Register 0 (SSPCR0 - 0xE006 8000)
This register controls the basic operation of the SSP controller.
Table 135: SSP Control Register 0 (SSPCR0 - address 0xE006 8000) bit description
Bit
3:0
5:4
User manual
Description
Control Register 0. Selects the serial clock
rate, bus type, and data size.
Control Register 1. Selects master/slave
and other modes.
Data Register. Writes fill the transmit FIFO,
and reads empty the receive FIFO.
Status Register
Interrupt Mask Set and Clear Register
Raw Interrupt Status Register
Masked Interrupt Status Register
SSPICR Interrupt Clear Register
Reset value relects the data stored in used bits only. It does not include reserved bits content.
Symbol Value Description
DSS Data Size Select. This field controls the number of bits
transferred in each frame. Values 0000-0010 are not
supported and should not be used.
0011 4 bit transfer
0100 5 bit transfer
0101 6 bit transfer
0110 7 bit transfer
0111 8 bit transfer
1000 9 bit transfer
1001 10 bit transfer
1010 11 bit transfer
1011 12 bit transfer
1100 13 bit transfer
1101 14 bit transfer
1110 15 bit transfer
1111 16 bit transfer
FRF Frame Format.
00 SPI
01 SSI
10 Microwire
11 This combinationion is not supported and should not be used.
Rev. 01 — 24 June 2005
UM10120
Chapter 13: SSP
[1]
Access Reset value
R/W 0x0000
R/W 0x00
R/W 0x0000
RO 0x03
R/W 0x00
R/W 0x00
R/W 0x04
RO 0x00
WO NA
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Address
0xE006 8000
0xE006 8004
0xE006 8008
0xE006 800C
0xE006 8010
0xE006 8014
0xE006 8018
0xE006 801C
0xE006 8020
Reset
value
0000
00
165