Philips LPC213 Series User Manual page 164

Philips Semiconductors
Volume 1
13.3.9 Setup and hold time requirements on CS with respect to SK in
Microwire mode
In the Microwire mode, the SSP slave samples the first bit of receive data on the rising
edge of SK after CS has gone LOW. Masters that drive a free-running SK must ensure
that the CS signal has sufficient setup and hold margins with respect to the rising edge of
SK.
Figure 45
edge on which the first bit of receive data is to be sampled by the SSP slave, CS must
have a setup of at least two times the period of SK on which the SSP operates. With
respect to the SK rising edge previous to this edge, CS must have a hold of at least one
SK period.
13.4 Register description
The SSP contains 9 registers as shown in
word accessible.
User manual
SK
CS
SO
LSB
SI
0 MSB
Fig 44. Microwire frame format (continuos transfers)
illustrates these setup and hold time requirements. With respect to the SK rising
SK
CS
SI
Fig 45. Microwire frame format (continuos transfers)
Rev. 01 — 24 June 2005
MSB
8 bit control
LSB
4 to 16 bits
output data
t =t
HOLD SK
Table 134. All registers are byte, half word and
UM10120
Chapter 13: SSP
LSB
MSB
4 to 16 bits
output data
t =2t
SETUP SK
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
LSB
164