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Philips Semiconductors
Volume 1
Table 55:
Connection of interrupt sources to the Vectored Interrupt Controller (VIC)
Block
Flag(s)
2
I
C1
SI (state change)
BOD
Brown Out detect
ADC1
A/D Converter 1 end of conversion
[1]
Interrupt request, masking and selection
SOFTINTCLEAR
VICINT
SOURCE
[31:0]
RAWINTERRUPT
Vector interrupt 0
SOURCE
VECTORCNTL[5:0]
Vector interrupt 1
Vector interrupt 15
Fig 14. Block diagram of the Vectored Interrupt Controller (VIC)
User manual
LPC2134/6/8 Only.
INTENABLECLEAR
[31:0]
[31:0]
SOFTINT
INTENABLE
[31:0]
[31:0]
INTSELECT
[31:0]
[31:0]
Priority 0
VECTIRQ0
ENABLE
VECTADDR0[31:0]
VECTORADDR
[31:0]
Priority1
VECTIRQ1
VECTADDR1[31:0]
Priority2
Priority14
VECTIRQ15
VECTADDR15[31:0]
Priority15
Rev. 01 — 24 June 2005
[1]
nVICFIQIN
Non-vectored FIQ interrupt logic
FIQSTATUS[31:0]
FIQSTATUS
[31:0]
Non-vectored IRQ interrupt logic
IRQSTATUS[31:0]
IRQSTATUS
[31:0]
Interrupt priority logic
HARDWARE
PRIORITY
LOGIC
DEFAULT
VECTORADDR
[31:0]
nVICIRQIN VICVECTADDRIN[31:0]
UM10120
Chapter 5: VIC
VIC Channel # and Hex
Mask
19
0x0008 0000
20
0x0010 0000
21
0x0020 0000
nVICFIQ
NonVectIRQ
IRQ
IRQ
nVICIRQ
Address select for
highest priority
interrupt
VICVECT
VECTORADDR
ADDROUT
[31:0]
[31:0]
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
58
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