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Philips Semiconductors
Volume 1
MATCH REGISTER 0
MATCH REGISTER 1
MATCH REGISTER 2
MATCH REGISTER 3
MATCH REGISTER 4
MATCH REGISTER 5
MATCH REGISTER 6
LATCH ENABLE REGISTER
MATCH CONTROL REGISTER
Interrupt Register
CONTROL
M[6.0]
INTERRUPT
STOP ON MATCH
RESET ON MATCH
CSN
ENABLE
RESET
TIMER CONTROL REGISTER
Note: this diagram is intended to clarify the function of the PWM rather than to suggest a specific design implementation.
Fig 49. PWM block diagram
User manual
SHADOW REGISTER 0
LOAD ENABLE
SHADOW REGISTER 1
LOAD ENABLE
SHADOW REGISTER 2
LOAD ENABLE
SHADOW REGISTER 3
LOAD ENABLE
SHADOW REGISTER 4
LOAD ENABLE
SHADOW REGISTER 5
LOAD ENABLE
SHADOW REGISTER 6
LOAD ENABLE
MATCH 0
CLEAR
=
=
CE
TCI
PRESCALE COUNTER
MAXVAL
PRESCALE REGISTER
Rev. 01 — 24 June 2005
=
=
=
=
=
TIMER COUNTER
PWMENA1..6
UM10120
Chapter 15: PWM
Match 0
PWM1
S
Q
Match 1
PWMENA1
R
EN
PWMSEL2
PWM2
MUX
S
Q
Match 2
PWMENA2
R
EN
PWMSEL3
PWM3
MUX
S
Q
Match 3
PWMENA3
R
EN
PWMSEL4
PWM4
MUX
S
Q
Match 4
PWMENA4
R
EN
PWMSEL5
PWM5
MUX
S
Q
Match 5
PWMENA5
EN
R
PWMSEL6
PWM6
MUX
S
Q
Match 6
PWMENA6
R
EN
PWMSEL2..6
PWM CONTROL REGISTER
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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