Power Control; Register Description; Power Control Register (Pcon - 0Xe01F Coco) - Philips LPC213 Series User Manual

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Philips Semiconductors
Volume 1

3.8 Power control

The LPC2131/2/4/6/8 supports two reduced power modes: Idle mode and Power-down
mode. In Idle mode, execution of instructions is suspended until either a Reset or interrupt
occurs. Peripheral functions continue operation during Idle mode and may generate
interrupts to cause the processor to resume execution. Idle mode eliminates power used
by the processor itself, memory systems and related controllers, and internal buses.
In Power-down mode, the oscillator is shut down and the chip receives no internal clocks.
The processor state and registers, peripheral registers, and internal SRAM values are
preserved throughout Power-down mode and the logic levels of chip pins remain static.
The Power-down mode can be terminated and normal operation resumed by either a
Reset or certain specific interrupts that are able to function without clocks. Since all
dynamic operation of the chip is suspended, Power-down mode reduces chip power
consumption to nearly zero.
Entry to Power-down and Idle modes must be coordinated with program execution.
Wakeup from Power-down or Idle modes via an interrupt resumes program execution in
such a way that no instructions are lost, incomplete, or repeated. Wake up from
Power-down mode is discussed further in
A Power Control for Peripherals feature allows individual peripherals to be turned off if
they are not needed in the application, resulting in additional power savings.

3.8.1 Register description

The Power Control function contains two registers, as shown in
descriptions follow.
Table 22:
Name
PCON
PCONP Power Control for Peripherals Register. This
[1]

3.8.2 Power Control register (PCON - 0xE01F COCO)

The PCON register contains two bits. Writing a one to the corresponding bit causes entry
to either the Power-down or Idle mode. If both bits are set, Power-down mode is entered.
User manual
Power control registers
Description
Power Control Register. This register contains
control bits that enable the two reduced power
operating modes of the microcontroller. See
Table
23.
register contains control bits that enable and
disable individual peripheral functions,
Allowing elimination of power consumption by
peripherals that are not needed.
Reset value relects the data stored in used bits only. It does not include reserved bits content.
Rev. 01 — 24 June 2005
Chapter 3: System Control Block
Section 3.11 "Wakeup timer" on page
Table
Access Reset
value
R/W
0x00
R/W
0x0018 17BE 0xE01F C0C4
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
UM10120
39.
22. More detailed
Address
[1]
0xE01F C0C0
33

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