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13.1 Features
13.2 Description
The SSP is a Synchronous Serial Port (SSP) controller capable of operation on a SPI,
4-wire SSI, or Microwire bus. It can interact with multiple masters and slaves on the bus.
Only a single master and a single slave can communicate on the bus during a given data
transfer. Data transfers are in principle full duplex, with frames of 4 to 16 bits of data
flowing from the master to the slave and from the slave to the master. In practice it is often
the case that only one of these data flows carries meaningful data.
Table 133: SSP pin descriptions
Interface pin name/function
Pin Name Type
SPI
SCK1
I/O
SCK
User manual
UM10120
Chapter 13: SSP Controller (SPI1)
Rev. 01 — 24 June 2005
•
Compatible with Motorola SPI, 4-wire TI SSI, and National Semiconductor Microwire
buses.
•
Synchronous Serial Communication
•
Master or slave operation
•
8-frame FIFOs for both transmit and receive.
•
4 to 16 bits frame
SSI
Microwire
CLK
SK
Rev. 01 — 24 June 2005
Pin Description
Serial Clock. SCK/CLK/SK is a clock signal used to
synchronize the transfer of data. It is driven by the master
and received by the slave. When SPI interface is used the
clock is programmable to be active high or active low,
otherwise it is always active high. SCK1 only switches
during a data transfer. Any other time, the SSP either holds
it in its inactive state, or does not drive it (leaves it in high
impedance state).
User manual
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
156
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