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Philips Semiconductors
Volume 1
1.3 Applications
1.4 Device information
Table 1:
Device
LPC2131
LPC2132
LPC2134
LPC2136
LPC2138
User manual
•
Up to 47 of 5 V tolerant general purpose I/O pins in tiny LQFP64 package.
•
Up to nine edge or level sensitive external interrupt pins available.
•
60 MHz maximum CPU clock available from programmable on-chip Phase-Locked
Loop (PLL) with settling time of 100 µs.
•
On-chip integrated oscillator operates with external crystal in range of 1 MHz to
30 MHz or with external oscillator from 1 MHz to 50 MHz.
•
Power saving modes include Idle and Power-down.
•
Individual enable/disable of peripheral functions as well as peripheral clock scaling
down for additional power optimization.
•
Processor wake-up from Power-down mode via external interrupt or Real-time Clock.
•
Single power supply chip with Power-On Reset (POR) and Brown-Out Detection
(BOD) circuits:
– CPU operating voltage range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O
pads
•
Industrial control
•
Medical systems
•
Access control
•
Point-of-sale
•
Communication gateway
•
Embedded soft modem
•
General purpose applications
LPC2131/2132/2134/2136/2138 device information
Number of
pins
64
64
64
64
64
Rev. 01 — 24 June 2005
On-chip
On-chip
Number of
SRAM
FLASH
10-bit ADC
channels
8 kB
32 kB
8
16 kB
64 kB
8
16 kB
128 kB
16
32 kB
256 kB
16
32 kB
512 kB
16
UM10120
Chapter 1: Introductory information
Number of
Note
10-bit DAC
channels
-
-
1
-
1
UART1 with full
modem interface
1
UART1 with full
modem interface
1
UART1 with full
modem interface
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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