Philips LPC213 Series User Manual page 184

Philips Semiconductors
Volume 1
A sample of how PWM values relate to waveform outputs is shown in
output logic is shown in
controlled PWM outputs via the muxes controlled by the PWMSELn bits. The match
register selections for various PWM outputs is shown in
supports up to N-1 single edge PWM outputs or (N-1)/2 double edge PWM outputs, where
N is the number of match registers that are implemented. PWM types can be mixed if
desired.
Table 153: Set and reset inputs for PWM Flip-Flops
PWM Channel
1
2
3
4
5
6
[1]
[2]
15.2.1 Rules for single edge controlled PWM outputs
User manual
Figure 49
The waveforms below show a single PWM cycle and demonstrate PWM outputs under the
following conditions:
The timer is configured for PWM mode.
Match 0 is configured to reset the timer/counter
when a match event occurs.
Control bits PWMSEL2 and PWMSEL4 are set.
PWM2
PWM4
PWM5
Fig 50. Sample PWM waveforms
Single Edge PWM (PWMSELn = 0)
Set by
Match 0
Match 0
Match 0
Match 0
Match 0
Match 0
Identical to single edge mode in this case since Match 0 is the neighboring match register. Essentially,
PWM1 cannot be a double edged output.
It is generally not advantageous to use PWM channels 3 and 5 for double edge PWM outputs because it
would reduce the number of double edge PWM outputs that are possible. Using PWM 2, PWM4, and
PWM6 for double edge PWM outputs provides the most pairings.
1. All single edge controlled PWM outputs go high at the beginning of a PWM cycle
unless their match value is equal to 0.
Rev. 01 — 24 June 2005
that allows selection of either single or double edge
0 27 41 53
Reset by
Match 1
Match 2
Match 3
Match 4
Match 5
Match 6
UM10120
Chapter 15: PWM
Figure
Table 153. This implementation
The match register values are as follows:
MRO = 100 (PWM rate)
MR1 = 41, MR2 = 78 (PWM2 output)
MR3 = 53, MR4 = 27 (PWM4 output)
MR5 = 65 (PWM5 output)
65 78 100
(counter is reset)
Double Edge PWM (PWMSELn = 1)
Set by Reset by
[1]
Match 0 Match 1
Match 1 Match 2
[2]
Match 2 Match 3
Match 3 Match 4
[2]
Match 4 Match 5
Match 5 Match 6
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
50. PWM
[1]
[2]
[2]
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