6.6.10 Peripheral hardware and source clocks
The following lists peripheral hardware and source clocks incorporated in the 78K0/KE2.
Source Clock
Peripheral Hardware
16-bit timer/
00
event counter
01
8-bit timer/
50
event counter
51
8-Bit timer
H0
H1
Watch timer
Watchdog timer
Buzzer output
Clock output
A/D converter
Serial interface
UART0
UART6
CSI10
CSI11
IIC0
Note When the CPU is operating on the subsystem clock and the internal high-speed oscillation clock has been
stopped, do not start operation of these functions on the external clock input from peripheral hardware pins.
Remark Y: Can be selected, N: Cannot be selected
CHAPTER 6 CLOCK GENERATOR
Table 6-10. Peripheral Hardware and Source Clocks
Peripheral
Subsystem Clock
Hardware Clock
(f
)
SUB
(f
)
PRS
Y
N
Y
N
Y
N
Y
N
Y
N
Y
N
Y
Y
N
N
Y
N
Y
Y
Y
N
Y
N
Y
N
Y
N
Y
N
Y
N
Preliminary User's Manual U17260EJ3V1UD
Internal Low-
TM50 Output
Speed Oscillation
Clock (f
)
RL
N
N
N
N
N
N
N
N
N
Y
Y
N
N
N
Y
N
N
N
N
N
N
N
N
Y
N
Y
N
N
N
N
N
N
External Clock
from Peripheral
Hardware Pins
Note
Y (TI000 pin)
Note
Y (TI001 pin)
Note
Y (TI50 pin)
Note
Y (TI51 pin)
N
N
N
N
N
N
N
N
N
Note
Y (SCK10 pin)
Note
Y (SCK11 pin)
Y (EXSCL0,
Note
SCL0 pin)
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