NEC 78K0 Series User Manual page 488

8-bit single-chip microcontrollers
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Interrupt
Default
Note 1
Type
Priority
Maskable
24
INTIIC0/
INTDMU
25
INTCSI11
26
INTTM001
27
INTTM011
Software
BRK
Reset
RESET
POC
LVI
WDT
Notes 1.
The default priority is the priority applicable when two or more maskable interrupts are generated
simultaneously. 0 is the highest priority, and 27 is the lowest.
2.
Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 19-1.
3.
The interrupt sources INTDMU, INTCSI11, INTTM001, and INTTM011 are available only in the
µ
PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D.
4.
When bit 1 (LVIMD) of the low-voltage detection register (LVIM) is set to 1.
488
CHAPTER 19 INTERRUPT FUNCTIONS
Table 19-1. Interrupt Source List (2/2)
Interrupt Source
Name
End of IIC0 communication/end of
Note 3
multiply/divide operation
Note 3
End of CSI11 communication
Note 3
Match between TM01 and CR001
(when compare register is specified),
TI011 pin valid edge detection
(when capture register is specified)
Note 3
Match between TM01 and CR011
(when compare register is specified),
TI001 pin valid edge detection
(when capture register is specified)
BRK instruction execution
Reset input
Power-on clear
Low-voltage detection
WDT overflow
Preliminary User's Manual U17260EJ3V1UD
Internal/
External
Trigger
Internal
Note 4
Vector
Basic
Table
Configuration
Note 2
Address
Type
0034H
(A)
0036H
0038H
003AH
003EH
(D)
0000H

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