NEC 78K0 Series User Manual page 637

Page
p. 85 Addition to description in 3.4.6 Register indirect addressing
p. 86 Addition to description in 3.4.7 Based addressing
p. 87 Addition to description in 3.4.8 Based indexed addressing
CHAPTER 4 MEMORY BANK SELECT FUNCTION (
p. 89 Addition of chapter
CHAPTER 5 PORT FUNCTIONS
p. 99 Modification of Table 5-1 Pin I/O Buffer Power Supplies
p. 102 Addition of Caution to 5.2.1 Port 0
p. 102 Modification of Figure 5-2 Block Diagram of P00
p. 103 Modification of Figure 5-3 Block Diagram of P01
p. 104 Modification of Figure 5-4 Block Diagram of P02
p. 105 Modification of Figure 5-5 Block Diagram of P03, P05
p. 106 Modification of Figure 5-6 Block Diagram of P04
p. 107 Modification of Figure 5-7 Block Diagram of P06
p. 108 Addition of Caution to 5.2.2 Port 1
p. 113 Addition of description to 5.2.3 Port 2 and addition of Table 5-4 Setting Functions of P20/ANI0 to
P27/ANI7 Pins
p. 121 Addition of Remark to and modification of Caution in 5.2.9 Port 12
p. 121 Modification of Figure 5-22 Block Diagram of P120
p. 122 Modification of Figure 5-23 Block Diagram of P121 to P124
p. 123 Addition of a figure to Remark in 5.2.10 Port 13
p. 129 Addition of (4) A/D port configuration register (ADPC) to 5.3 Registers Controlling Port Function
pp. 132, 133 Addition of Remark 2 and Notes 1 and 2 to Table 5-5 Settings of Port Mode Register and Output Latch
When Using Alternate Function (2/2)
CHAPTER 6 CLOCK GENERATOR
p. 134 Modification of oscillation frequency range X1 oscillator and external main system clock in 6.1 (1) Main
system clock
p. 135 Addition to description in 6.1 (3) Internal low-speed oscillation clock
p. 136 Modification of Figure 6-1 Block Diagram of Clock Generator
p. 139 Modification of Figure 6-3 Format of Processor Clock Control Register (PCC)
p. 140 Addition of 6.3 (3) Setting of operation mode for subsystem clock pin
p. 145 Modification of description in 6.3 (8) Oscillation stabilization time select register (OSTS)
p. 146 Modification of oscillation frequency range in 6.4.1 X1 oscillator
p. 149 Modification of description in 6.4.3 When subsystem clock is not used
p. 151 Addition of Figure 6-12 Clock Generator Operation When Power Supply Voltage Is Turned On (When
1.59 V POC Mode Is Set (Option Byte: POCMODE = 0))
p. 152 Addition of Figure 6-13 Clock Generator Operation When Power Supply Voltage Is Turned On (When
2.7 V/1.59 V POC Mode Is Set (Option Byte: POCMODE = 1))
p. 153 Modification of 6.6.1 Controlling high-speed system clock
p. 156 Modification of 6.6.2 Example of controlling internal high-speed oscillation clock
p. 158 Modification of 6.6.3 Example of controlling subsystem clock
p. 160 Modification of description in Table 6-4 Clocks Supplied to CPU and Peripheral Hardware, and Register
Setting
APPENDIX D REVISION HISTORY
Description
µ
PD78F0536, 78F0537, AND 78F0537D ONLY)
Preliminary User's Manual U17260EJ3V1UD
(2/7)
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