NEC 78K0 Series User Manual page 179

(2) Capture/compare control register 0n (CRC0n)
CRC0n is the register that controls the operation of CR00n and CR01n.
Changing the value of CRC0n is prohibited during operation (when TMC0n3 and TMC0n2 = other than 00).
CRC0n can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears CRC0n to 00H.
µ
Remark n = 0: PD78F0531, 78F0532, 78F0533
µ
n = 0, 1: PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
Figure 7-8. Format of Capture/Compare Control Register 00 (CRC00)
Address: FFBCH After reset: 00H
Symbol 7
CRC00 0
CRC002
0
1
CRC001
0
1
The valid edge of the TI010 and TI000 pin is set by PRM00.
If ES001 and ES000 are set to 11 (both edges) when CRC001 is 1, the valid edge of the TI000 pin cannot
be detected.
CRC000
0
1
If TMC003 and TMC002 are set to 11 (clear & start mode entered upon a match between TM00 and
CR000), be sure to set CRC000 to 0.
Note When the valid edge is detected from the TI010 pin, the capture operation is not performed but the
INTTM000 signal is generated as an external interrupt signal.
Caution To ensure that the capture operation is performed properly, the capture trigger requires a pulse
two cycles longer than the count clock selected by prescaler mode register 00 (PRM00).
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
R/W
6 5
0 0
CR010 operating mode selection
Operates as compare register
Operates as capture register
Captures on valid edge of TI010 pin
Captures on valid edge of TI000 pin by reverse phase
CR000 operating mode selection
Operates as compare register
Operates as capture register
Preliminary User's Manual U17260EJ3V1UD
4 3 2
0 0 CRC002
CR000 capture trigger selection
Note
1 0
CRC001 CRC000
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