NEC 78K0 Series User Manual page 117

5.2.6 Port 5
Port 5 is a 4-bit I/O port with an output latch. Port 5 can be set to the input mode or output mode in 1-bit units
using port mode register 5 (PM5). When the P50 to P53 pins are used as an input port, use of an on-chip pull-up
resistor can be specified in 1-bit units by pull-up resistor option register 5 (PU5).
Reset signal generation sets port 5 to input mode.
ns ari 21
ns 3Tw [(it5r.6 -1.1( bit5r.6 -1.15 an o9T-6.9m7)Tjwg4 1 -wg4 1 b54.9(e)-4r.540u54g4d.3 g9t5 08 97597R73wg4i 67/.6 333 )597e097/.6 8.6 97 bit5r.6 -1251 28Tc 0.1029 Tw [(be set to the i6)997.53 P1 ra3 po 71 to th929 Tw [(g0g4 16re f 7.2333 -1.s5l0Mh3 0 7.9to P)-70.0033 Tw52 po 0htmo6447R674r6 6 -1.s5l0Me8 T-6853.6( -1.s597.5 674r6 6 g0g4 1T16 78(9a i( ) rc54igu7.5 ra
CHAPTER 5 PORT FUNCTIONS
74p874 bitc54itc543i re f BT /Fs
Preliminary User's Manual U17260EJ3V1UD
B55 55 7F i( i( ) rc5 i( ) d277.5 ra5 i( ) (5.8 ) d277.28 747) (5.8 ) d27(82s 3Two )/. ) 16re f 7.4e8o )/43 96re ea5 i( ) (5.8 ) d278r 5.8 (41( 52n25 tJw po P)- - 0n079 O66ing )- ]TJ 3 747612457 it( 0n070n0708 0 0 7.T0n070n0708 0 0 7]t 7.n074cgrs) U1 i(.9 7)971b.9i4 e .5S [(ns 3 0ge)-4r67b]TJ 3
0.0 97/ [(ns5-67b.2( ) reA
7e0 081 84R003r
bitc5utpu.006c54igu7.5535 (U079a i( ) ragr.5
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