NEC 78K0 Series User Manual page 355

Figure 15-5. Format of Asynchronous Serial Interface Operation Mode Register 6 (ASIM6) (2/2)
PS61
0
0
1
1
CL6
0 Character length of data = 7 bits
1 Character length of data = 8 bits
SL6
0 Number of stop bits = 1
1 Number of stop bits = 2
ISRM6
0 "INTSRE6" occurs in case of error (at this time, INTSR6 does not occur).
1 "INTSR6" occurs in case of error (at this time, INTSRE6 does not occur).
Note If "reception as 0 parity" is selected, the parity is not judged. Therefore, bit 2 (PE6) of asynchronous serial
interface reception error status register 6 (ASIS6) is not set and the error interrupt does not occur.
Cautions 1. To start the transmission, set POWER6 to 1 and then set TXE6 to 1. To stop the transmission,
clear TXE6 to 0, and then clear POWER6 to 0.
2. To start the reception, set POWER6 to 1 and then set RXE6 to 1. To stop the reception, clear
RXE6 to 0, and then clear POWER6 to 0.
3. Set POWER6 to 1 and then set RXE6 to 1 while a high level is input to the R
POWER6 is set to 1 and RXE6 is set to 1 while a low level is input, reception is started.
4. TXE6 and RXE6 are synchronized by the base clock (f
transmission or reception again, set TXE6 or RXE6 to 1 at least two clocks of the base clock
after TXE6 or RXE6 has been cleared to 0. If TXE6 or RXE6 is set within two clocks of the
base clock, the transmission circuit or reception circuit may not be initialized.
5. Set transmit data to TXB6 at least one base clock (f
6. Clear the TXE6 and RXE6 bits to 0 before rewriting the PS61, PS60, and CL6 bits.
7. Fix the PS61 and PS60 bits to 0 when mounting the device on LIN.
8. Clear TXE6 to 0 before rewriting the SL6 bit.
number of stop bits = 1", and therefore, is not affected by the set value of the SL6 bit.
9. Make sure that RXE6 = 0 when rewriting the ISRM6 bit.
CHAPTER 15 SERIAL INTERFACE UART6
PS60 Transmission operation
0 Does not output parity bit.
1 Outputs 0 parity.
0 Outputs odd parity.
1 Outputs even parity.
Specifies character length of transmit/receive data
Specifies number of stop bits of transmit data
Enables/disables occurrence of reception completion interrupt in case of error
Preliminary User's Manual U17260EJ3V1UD
Reception operation
Reception without parity
Note
Reception as 0 parity
Judges as odd parity.
Judges as even parity.
) set by CKSR6.
XCLK6
) after setting TXE6 = 1.
XCLK6
Reception is always performed with "the
D6 pin. If
X
To enable
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