Register Controlling Watchdog Timer - NEC 78K0 Series User Manual

11.3 Register Controlling Watchdog Timer

The watchdog timer is controlled by the watchdog timer enable register (WDTE).
(1) Watchdog timer enable register (WDTE)
Writing ACH to WDTE clears the watchdog timer counter and starts counting again.
This register can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 9AH or 1AH
Figure 11-2. Format of Watchdog Timer Enable Register (WDTE)
Address: FF99H After reset: 9AH/1AH
7
Symbol
WDTE
Note The WDTE reset value differs depending on the WDTON setting value of the option byte (0080H). To
operate watchdog timer, set WDTON to 1.
0 (watchdog timer count operation disabled)
1 (watchdog timer count operation enabled)
Cautions 1. If a value other than ACH is written to WDTE, an internal reset signal is generated. If the
source clock to the watchdog timer is stopped, however, an internal reset signal is
generated when the source clock to the watchdog timer resumes operation.
2. If a 1-bit memory manipulation instruction is executed for WDTE, an internal reset signal
is generated. If the source clock to the watchdog timer is stopped, however, an internal
reset signal is generated when the source clock to the watchdog timer resumes operation.
3. The value read from WDTE is 9AH/1AH (this differs from the written value (ACH)).
CHAPTER 11 WATCHDOG TIMER
Note
R/W
6 5 4
WDTON Setting Value
Preliminary User's Manual U17260EJ3V1UD
Note
.
3 2
WDTE Reset Value
1AH
9AH
1 0
295