NEC 78K0 Series User Manual page 345

(4) Permissible baud rate range during reception
The permissible error from the baud rate at the transmission destination during reception is shown below.
Caution Make sure that the baud rate error during reception is within the permissible error range, by
using the calculation expression shown below.
Figure 14-12. Permissible Baud Rate Range During Reception
Data frame length
of UART0
Minimum permissible
data frame length
Maximum permissible
data frame length
As shown in Figure 14-12, the latch timing of the receive data is determined by the counter set by baud rate
generator control register 0 (BRGC0) after the start bit has been detected. If the last data (stop bit) meets this
latch timing, the data can be correctly received.
Assuming that 11-bit data is received, the theoretical values can be calculated as follows.
−
1
FL = (Brate)
Brate: Baud rate of UART0
k: Set value of BRGC0
FL: 1-bit data length
Margin of latch timing: 2 clocks
CHAPTER 14 SERIAL INTERFACE UART0
Latch timing
Start bit Bit 0 Bit 1
FL
Bit 0 Bit 1
Start bit
Start bit Bit 0 Bit 1
Preliminary User's Manual U17260EJ3V1UD
Bit 7 Parity bit
1 data frame (11 × FL)
Bit 7
Parity bit
FLmin
Bit 7 Parity bit
FLmax
Stop bit
Stop bit
Stop bit
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