NEC 78K0 Series User Manual page 443

8-bit single-chip microcontrollers
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(2) Master operation (multi-master system)
Figure 17-24. Master Operation Flowchart (Multi-Master System) (1/3)
START
Setting port
IICX0 ← 0XH
IICCL0 ← XXH
SVA0 ← XXH
IICF0 ← 0XH
Setting STCEN and IICRSV
IICC0 ← XXH
ACKE0 = WTIM0 = SPIE0 = 1
IICE0 = 1
Note
Checking bus status
Bus status is
being checked.
INTIIC0
No
interrupt occurs?
Yes
SPD0 = 1?
Yes
Waiting to be specified as a slave by other master
1
Waiting for a communication start request (depends on user program)
Master operation
starts?
Yes
(Communication start request)
SPIE0 = 1
IICRSV = 0?
Yes
A
Enables reserving
communication.
Note Confirm that the bus is released (CLD0 bit = 1, DAD0 bit = 1) for a specific period (for example, for a period
of one frame). If the SDA0 pin is constantly at low level, decide whether to release the I
SDA0 pins = high level) in conformance with the specifications of the product that is communicating.
CHAPTER 17 SERIAL INTERFACE IIC0
2
Sets each pin in the I
C mode (see 17.3 (7) Port mode register 6 (PM6)).
Selects a transfer clock.
Sets a local address.
Sets a start condition.
Releases the bus for a specific period.
STCEN = 1?
Yes
No
Slave operation
No
(No communication start request)
SPIE0 = 0
interrupt occurs?
No
Slave operation
B
Disables reserving
communication.
Preliminary User's Manual U17260EJ3V1UD
No
SPT0 = 1
INTIIC0
interrupt occurs?
SPD0 = 1?
INTIIC0
No
Waits for a communication request.
Yes
Prepares for starting
communication
(generates a stop condition).
No
Waits for detection
of the stop condition.
Yes
No
Yes
Slave operation
2
C bus (SCL0 and
443

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