NEC 78K0 Series User Manual page 373

(e) Normal reception
Reception is enabled and the R
interface operation mode register 6 (ASIM6) is set to 1 and then bit 5 (RXE6) of ASIM6 is set to 1.
The 8-bit counter of the baud rate generator starts counting when the falling edge of the R
detected. When the set value of baud rate generator control register 6 (BRGC6) has been counted, the
R D6 pin input is sampled again (
X
as a start bit.
When the start bit is detected, reception is started, and serial data is sequentially stored in the receive shift
register (RXS6) at the set baud rate. When the stop bit has been received, the reception completion interrupt
(INTSR6) is generated and the data of RXS6 is written to receive buffer register 6 (RXB6). If an overrun
error (OVE6) occurs, however, the receive data is not written to RXB6.
Even if a parity error (PE6) occurs while reception is in progress, reception continues to the reception
position of the stop bit, and a reception error interrupt (INTSR6/INTSRE6) is generated on completion of
reception.
Figure 15-19. Reception Completion Interrupt Request Timing
Start
R D6 (input)
X
INTSR6
RXB6
Cautions 1. If a reception error occurs, read ASIS6 and then RXB6 to clear the error flag. Otherwise,
an overrun error will occur when the next data is received, and the reception error
status will persist.
2. Reception is always performed with the "number of stop bits = 1". The second stop bit
is ignored.
3. Be sure to read asynchronous serial interface reception error status register 6 (ASIS6)
before reading RXB6.
CHAPTER 15 SERIAL INTERFACE UART6
D6 pin input is sampled when bit 7 (POWER6) of asynchronous serial
X
in Figure 15-19). If the R
D0 D1 D2 D3 D4
Preliminary User's Manual U17260EJ3V1UD
D6 pin is low level at this time, it is recognized
X
D5 D6 D7 Parity
D6 pin input is
X
Stop
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