NEC 78K0 Series User Manual page 518

Cautions 1. To use the peripheral hardware that stops operation in the STOP mode, and the peripheral
hardware for which the clock that stops oscillating in the STOP mode after the STOP mode is
released, restart the peripheral hardware.
2. Even if "internal low-speed oscillator can be stopped by software" is selected by the option
byte, the internal low-speed oscillation clock continues in the STOP mode in the status before
the STOP mode is set. To stop the internal low-speed oscillator's oscillation in the STOP mode,
stop it by software and then execute the STOP instruction.
3. To shorten oscillation stabilization time after the STOP mode is released when the CPU operates
with the high-speed system clock (X1 oscillation), temporarily switch the CPU clock to the
internal high-speed oscillation clock before the next execution of the STOP instruction. Before
changing the CPU clock from the internal high-speed oscillation clock to the high-speed system
clock (X1 oscillation) after the STOP mode is released, check the oscillation stabilization time
with the oscillation stabilization time counter status register (OSTC).
4. If the STOP instruction is executed with AMPH set to 1 when the internal high-speed oscillation
clock or external main system clock is used as the CPU clock, the internal high-speed
oscillation clock or external main system clock is supplied to the CPU 5
mode has been released.
(2) STOP mode release
Figure 21-5. Operation Timing When STOP Mode Is Released
STOP mode release
STOP mode
High-speed system
clock (X1 oscillation)
Internal high-speed
oscillation clock
High-speed system
clock (X1 oscillation)
is selected as CPU
clock when STOP
instruction is executed
Internal high-speed
oscillation clock is
selected as CPU clock
when STOP instruction
is executed
Note When AMPH = 1
The STOP mode can be released by the following two sources.
518
CHAPTER 21 STANDBY FUNCTION
Wait for oscillation
accuracy
stabilization
HALT status
(oscillation stabilization time set by OSTS)
Internal high-speed
oscillation clock
µ
Note
5 s (TYP.)
Preliminary User's Manual U17260EJ3V1UD
µ
s (MIN.) after the STOP
High-speed system clock
Automatic selection
High-speed system clock
Clock switched
by software