NEC 78K0 Series User Manual page 249

Figure 8-6. Format of Timer Clock Selection Register 51 (TCL51)
Address: FF8CH After reset: 00H
Symbol 7
TCL51 0
TCL512
0
0
0
0
1
1
1
1
Cautions 1. When rewriting TCL51 to other data, stop the timer operation beforehand.
2. Be sure to clear bits 3 to 7 to 0.
Remark f : Peripheral hardware clock frequency
PRS
CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 50 AND 51
R/W
6 5
0 0
TCL511 TCL510
0 0 TI51 pin falling edge
0 1 TI51 pin rising edge
1 0 f
PRS
1 1 f /2
PRS
0 0 f /2
PRS
0 1 f /2
PRS
1 0 f /2
PRS
1 1 f /2
PRS
Preliminary User's Manual U17260EJ3V1UD
4 3 2
0 0 TCL512
Count clock selection
f = f =
PRS PRS
2 MHz 5 MHz
2 MHz 5 MHz
1 MHz 2.5 MHz
4
125 kHz 312.5 kHz
6
31.25 kHz 78.13 kHz
8
7.81 kHz 19.53 kHz
12
0.49 kHz 1.22 kHz
1 0
TCL511 TCL510
f = f =
PRS PRS
10 MHz 20 MHz
10 MHz 20 MHz
5 MHz 10 MHz
625 kHz 1.25 MHz
156.25 kHz 312.5 kHz
39.06 kHz 78.13 kHz
2.44 kHz 4.88 kHz
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