NEC 78K0 Series User Manual page 210

Figure 7-35. Example of Register Settings in Clear & Start Mode Entered by TI00n Pin Valid Edge Input (1/2)
(a) 16-bit timer mode control register 0n (TMC0n)
0 0
(b) Capture/compare control register 0n (CRC0n)
0 0
(c) 16-bit timer output control register 0n (TOC0n)
OSPT0n OSPE0n
0 0
Note The timer output (TO0n) cannot be used when detecting the valid edge of the TI01n pin is used.
µ
Remark n = 0: PD78F0531, 78F0532, 78F0533
µ
n = 0, 1: PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
210
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
TMC0n3 TMC0n2 TMC0n1
0 0 1
CRC0n2 CRC0n1 CRC0n0
0 0 0
TOC0n4 LVS0n
0 0/1 0/1
Preliminary User's Manual U17260EJ3V1UD
OVF0n
0 0/1 0
0: Inverts TO0n output on match
1: Inverts TO0n output on match
Clears and starts at valid
edge input of TI00n pin.
0/1 0/1 0/1
0: CR00n used as compare register
1: CR00n used as capture register
0: TI01n pin is used as capture
1: Reverse phase of TI00n pin is
0: CR01n used as compare register
1: CR01n used as capture register
LVR0n TOC0n1 TOE0n
0/1 0/1 0/1
between CR00n and CR01n.
between CR00n and CR01n
and valid edge of TI00n pin.
trigger of CR00n.
used as capture trigger of CR00n.
Note
0: Disables TO0n output
1: Enables TO0n output
Specifies initial value of
TO0n output F/F
00: Does not invert TO0n output on match
between TM0n and CR00n/CR01n.
01: Inverts TO0n output on match between
TM0n and CR00n.
10: Inverts TO0n output on match between
TM0n and CR01n.
11: Inverts TO0n output on match between
TM0n and CR00n/CR01n.