Operation Of 8-Bit Timers H0 And H1; Operation As Interval Timer/Square-Wave Output - NEC 78K0 Series User Manual

9.4 Operation of 8-Bit Timers H0 and H1

9.4.1 Operation as interval timer/square-wave output

When the 8-bit timer counter Hn and compare register 0n (CMP0n) match, an interrupt request signal (INTTMHn)
is generated and the 8-bit timer counter Hn is cleared to 00H.
Compare register 1n (CMP1n) is not used in interval timer mode. Since a match of the 8-bit timer counter Hn and
the CMP1n register is not detected even if the CMP1n register is set, timer output is not affected.
By setting bit 0 (TOENn) of timer H mode register n (TMHMDn) to 1, a square wave of any frequency (duty = 50%)
is output from TOHn.
Setting
<1> Set each register.
Figure 9-9. Register Setting During Interval Timer/Square-Wave Output Operation
(i) Setting timer H mode register n (TMHMDn)
TMHEn CKSn2
TMHMDn 0 0/1
(ii) CMP0n register setting
The interval time is as follows if N is set as a comparison value.
• Interval time = (N +1)/f
<2> Count operation starts when TMHEn = 1.
<3> When the values of the 8-bit timer counter Hn and the CMP0n register match, the INTTMHn signal is
generated and the 8-bit timer counter Hn is cleared to 00H.
<4> Subsequently, the INTTMHn signal is generated at the same interval. To stop the count operation, clear
TMHEn to 0.
Remarks 1. For the setting of the output pin, see 9.3 (3) Port mode register 1 (PM1).
2. For how to enable the INTTMHn signal interrupt, see CHAPTER 19 INTERRUPT FUNCTIONS.
3. n = 0, 1
CHAPTER 9 8-BIT TIMERS H0 AND H1
CKSn1 CKSn0 TMMDn1
0/1 0/1 0
CNT
Preliminary User's Manual U17260EJ3V1UD
TMMDn0 TOLEVn TOENn
0 0/1 0/1
Timer output setting
Default setting of timer output level
Interval timer mode setting
Count clock (f ) selection
CNT
Count operation stopped
271