Binary Output - Toshiba GR-200 Series Instruction Manual

Note: Setting items "On Delay timer and others" are displayed when the user sets
[BI*_CPL] On.

Binary output

(iii)
All binary output circuits (BOs) are also user-configurable; the user can configure timers and
switches using CPL settings. (For more information of CPL, see Chapter
Binary IO module: Binary output circuit
Selection of binary output circuit: Figure 12.6-7 illustrates the selection of a
binary output circuit on a BIO module. Move the cursor by pressing ▲ and
▼. Press ► to go to the next level in the hierarchy.
Binary Output
10:48
Slot#1
_Slot#2
Slot#3
Figure 12.6-7 Selection of slot and binary output circuit (Sample)
CPL Setting: Figure 12.6-8 illustrates the setting of a BO circuit (BO1). When
setting [BI1_CPL]=On, the BO1 CPL logic is applicable. Assigned signals,
timers and switches should be set using this menu. Note that detailed setting
items are shown when On is keyed into setting [BI*_CPL].
BI1
10:48
BI1_CPL
Off
On Delay Timer +
Off Delay Timer +
Inverse-SW
Normal
Figure 12.6-6 CPL setting (Sample)
→p. 542)
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[►]
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- 889 -
1/4
+
0.000 s
0.000 s
+
Slot#2
10:48
_BO1
BO2
BO3
BO4
BO5
BO6
6F2T0200 (0.15)
Technical description:
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GRE200 (1,2)