Toshiba GR-200 Series Instruction Manual page 704

Supervision of FPGA (FPGA error)
10.2.6
Detecting errors on FPGA will be provided when CPU detects fatal failures.
Error level
(i)
The error level has been set at level 1 (Serious error) in the automatic supervision. Checking
errors is carried out at any time. If an error is detected, the IED automatically restarts the
operation. Clearing the error message will be made promptly when the error is cleared.
Error message
(ii)
When detecting an error, the error message will be shown on the LCD screen. LED will be lit
up.
Table 10.2-11 Error messages provided by the supervisor in CHK_FPGA
Message and level
CP*_ (FPAG) error
Error level
Table 10.2-12 Detailed information in Hexadecimal in CHK_FPGA
Display
area
Top
00000004: FPGA mode
row
Middle
(No information displayed)
row
Bottom
(No information is displayed)
row
Problem detected in the FPGA on the following module
instructed with "CP*_" as follows:
CP1M:
Serious error (Level 1)
Meaning of the detailed information
Left column
- 685 -
Meaning of the information
CPU module
00000008: FPAG interruption process
(No information displayed)
(No information is displayed)
6F2T0200 (0.15)
Right column
GRE200 (1,2)