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Bit 4—Watchdog Timer Overflow Flag (WOVF): Indicates that WTCNT has overflowed in
watchdog timer mode. This flag is not set in interval timer mode.
Bit 4: WOVF
0
1
Bit 3—Interval Timer Overflow Flag (IOVF): Indicates that WTCNT has overflowed in
interval timer mode. This flag is not set in watchdog timer mode.
Bit 3: IOVF
0
1
Bits 2 to 0—Clock Select 2 to 0 (CKS2–CKS0): These bits select the clock used for the WTCNT
count from eight clocks obtained by dividing the frequency divider 2 input clock. The overflow
periods shown in the following table are for use of a 33 MHz input clock, with frequency divider 1
off, and PLL circuit 1 on.
Bit 2: CKS2
Bit 1: CKS1
0
0
1
1
0
1
Note: The up-count may not be performed correctly if bits CKS2–CKS0 are modified while the
WDT is running. Always stop the WDT before modifying these bits.
Description
No overflow
WTCNT has overflowed in watchdog timer mode
Description
No overflow
WTCNT has overflowed in interval timer mode
Bit 0: CKS0
0
1
0
1
0
1
0
1
Clock Division Ratio
1/32
(Initial value)
1/64
1/128
1/256
1/512
1/1024
1/2048
1/4096
(Initial value)
(Initial value)
Description
Overflow Period
41 µs
82 µs
164 µs
328 µs
656 µs
1.31 ms
2.62 ms
5.25 ms
Rev. 4.0, 04/00, page 211 of 850
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