Dram Interface - Hitachi SH7750 series Hardware Manual

13.3.4

DRAM Interface

Direct Connection of DRAM: When the memory type bits (DRAMTP2–0) in BCR1 are set to
100, area 3 becomes DRAM space; when set to 101, area 2 and area 3 become DRAM space. The
DRAM interface function can then be used to connect DRAM to the SH7750.
16, 32, or 64 bits can be selected as the interface data width for area 3 when bits DRAMTP2–0 are
set to 100, and 16 or 32 bits can be used for both area 2 and area 3 when bits DRAMTP2–0 are set
to 101.
2-CAS 16-bit DRAMs can be connected, since &$6 is used to control byte access.
Signals used for connection when DRAM is connected to area 3 are 5$6, &$63 to &$6:, and
RD/:5. &$65 to &$6: are not used when the data width is 16 bits. When DRAM is connected
to areas 2 and 3, the signals for area 2 DRAM connection are 5$65, &$67 to &$6:, and RD/:5,
and those for area 3 DRAM connection are 5$6, &$63 to &$66, and RD/:5.
In addition to normal read and write access modes, fast page mode is supported for burst access.
For DRAM connected to areas 2 and 3, EDO mode, which enables the DRAM access time to be
increased, is supported.
Rev. 4.0, 04/00, page 332 of 850