Multiprocessor Communication Function - Hitachi SH7750 series Hardware Manual

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Start
1
bit
Serial
0
D0
data
RDRF
FER
15.3.3

Multiprocessor Communication Function

The multiprocessor communication function performs serial communication using a
multiprocessor format, in which a multiprocessor bit is added to the transfer data, in asynchronous
mode. Use of this function enables data transfer to be performed among a number of processors
sharing a serial transmission line.
When multiprocessor communication is carried out, each receiving station is addressed by a
unique ID code.
The serial communication cycle consists of two cycles: an ID transmission cycle which specifies
the receiving station , and a data transmission cycle. The multiprocessor bit is used to differentiate
between the ID transmission cycle and the data transmission cycle.
The transmitting station first sends the ID of the receiving station with which it wants to perform
serial communication as data with a 1 multiprocessor bit added. It then sends transmit data as data
with a 0 multiprocessor bit added.
The receiving station skips the data until data with a 1 multiprocessor bit is sent.
When data with a 1 multiprocessor bit is received, the receiving station compares that data with its
own ID. The station whose ID matches then receives the data sent next. Stations whose ID does
not match continue to skip the data until data with a 1 multiprocessor bit is again received. In this
way, data communication is carried out among a number of processors.
Figure 15.12 shows an example of inter-processor communication using a multiprocessor format.
Data
Parity
bit
D1
D7
0/1
RXI interrupt
request
One frame
Figure 15.11 Example of SCI Receive Operation
(Example with 8-Bit Data, Parity, One Stop Bit)
Stop
Start
bit
bit
1
0
D0
D1
SCRDR1 data read and
RDRF flag cleared to 0
by RXI interrupt handler
Data
Parity
Stop
bit
bit
D7
0/1
0
ERI interrupt request
generated by framing
error
Rev. 4.0, 04/00, page 543 of 850
0/1

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