Appendix - Hitachi SH7750 series Hardware Manual

Appendix D &.,25(1% Pin Configuration
SH7750 Series
rdwr_pullup_control
Bus clock
Rev. 4.0, 04/00, page 824 of 850
rd_pullup_control
rd_dt_
rd_hiz_control
rdwr_dt_
rdwr_hiz_control
PLL2
ckio_hiz_control
Figure D.1 &.,25(1% &.,25(1% Pin Configuration
&.,25(1% &.,25(1%
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
/ /
RD/
RD/
CKIO
CKIO2