Hitachi SH7750 series Hardware Manual page 509

Superh risc engine
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Four requests can be queued
CLK
4th
1st
2nd
3rd
DBREQ
BAVL
TR
A25–A0
D63–D0
RAS,
CAS, WE
TDACK
ID1, ID0
Figure 14.50 Single Address Mode/Burst Mode/External Bus → → → → External Device Data
Transfer (Active Bank Address)/Direct Data Transfer Request to Channel 2
Rev. 4.0, 04/00, page 498 of 850
5th
CA
CA
D0
D1
RD
RD
Handshaking is necessary
to send additional requests
CA
D2
D3
D0
D2
D1
RD
D3
D0
D2
D1
NOP
Must be ignored
(no request transmitted)

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